Hartmut and Dick,
Here are my comments and action items:
1) Since G chip looks more promising, we should spend more resources in making G chip work reliably. That is the first priority is to make sure removing the added(?) threshold stabilizer would not affect other characteristics of the G chip.
2) TOT has turned out to be quite useful event it was poorly functioning in
Flight Eng. Model:
2a) Mizuno discovered unexpectedly large slewing time in the BFEM
threshold circuit going to trigger.
2b) Eduardo found BFEM TOT gives about a factor of 2 rejection of
Compton background: (Pair conversion gives 2 unresolved tracks
but Compton scattering gives only 1 track.)
3) In BFEM low energy X-rays gave about 1 extra hit per tower per trigger. So the noise occupancy lower than 10**2 per chip (assuming 1us gate for readin) will be tolerable. What I would like to see is "stability" of threshold relative to the noise curve. External conditions like temperature, supply voltage, counting rate, etc.should not change the noise occupancy significantly.
4) Read in rate of 10MHz will not be acceptable because this will mean twice longer time to read the coordinates in. We need a realistic filtering time from JJ. My past experiences tell me untill you implement and run in a realistic environment, you'd better be very conservative. No DAQ nor on-line software worked as well as the design: if it comes within a factor of 2-3, it should be commended.
Action item 1) As all agreed, cut the two connections in the G design and prove that the characteristics do not change.
Action item 2) Test that 18MHz will give ample margin in timing: temperature supply voltage and counting rate need to be varied.
Action item 3) Test stability of TOT against counting rate and heavy ion crossing.